Warn when testpoints are inside courtyards - #177

Summary

• add checkTestPointAccessibility to identify testpoint access centers inside another component's courtyard on the same PCB side
• return a readable pcb_placement_error naming both the testpoint and obstructing component
• include the check in runAllPlacementChecks and export it publicly
• cover blocked, clear, and opposite-side placements with a PCB snapshot

Why

Courtyard-to-pad comparisons are deliberately excluded from the general footprint overlap check. As a result, a testpoint could be placed beneath an assembled component without any accessibility diagnostic. This adds a targeted check without changing the broader courtyard/footprint overlap semantics.

@tscircuit/core already consumes runAllPlacementChecks in its final DRC pass, so the new diagnostic flows into core after this package is released. The checks release workflow is configured to trigger the standard core dependency update.

User impact

Designs now receive messages such as:

Test point TP_SWCLK is not accessible because it is inside the courtyard of C_BIAS_IN

The check is layer-aware, so a bottom-side testpoint is not blocked by a top-side courtyard.

Validation

• bun test — 136 passed, 0 failed
• bunx tsc --noEmit
• bun run build
• reproduced against the RP2040 MICROFC board Circuit JSON; exactly one inaccessible testpoint was reported